LinkedInยทWednesday, 12 August 2026ยท14d ago
๐ ๐ผ๐ฟ๐ฒ ๐ฑ๐ฎ๐๐ฎ. ๐๐ถ๐ด๐ต๐ฒ๐ฟ ๐๐ฝ๐ฒ๐ฒ๐ฑ๐. ๐ฆ๐บ๐ฎ๐น๐น๐ฒ๐ฟ ๐ฐ๐ต๐ถ๐ฝ๐น๐ฒ๐๐. AI infrastructure (and the underlying interconnects) areโฆ
imec
177,156 followers
๐ ๐ผ๐ฟ๐ฒ ๐ฑ๐ฎ๐๐ฎ. ๐๐ถ๐ด๐ต๐ฒ๐ฟ ๐๐ฝ๐ฒ๐ฒ๐ฑ๐. ๐ฆ๐บ๐ฎ๐น๐น๐ฒ๐ฟ ๐ฐ๐ต๐ถ๐ฝ๐น๐ฒ๐๐.
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AI infrastructure (and the underlying interconnects) are being pushed into increasingly challenging territory. One way forward? Bringing different semiconductor technologies together to get the best of each.
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Imecโs RF silicon interposer technology combines CMOS, BiCMOS and III-V chiplets to enable high-frequency, extreme-bandwidth systems. Early design assessments indicate it could shrink III-V chiplet area by more than 3x - without sacrificing performance.
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A promising approach as hyperscalers look to scale AI infrastructure.
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Full article: https://lnkd.in/eMKQC8GW
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