Overview
Owner at Resources
I am an electronic engineer with an entrepreneurial spirit. My main interest are: HDL-based design and methodology, electronic design automation (EDA), and internet technologies.
I have participated in a wide range of successful digital ASIC, mixed-signal ASIC and FPGA design projects for telecom, DSP, sensor, and image processing applications. I have in-depth experience in methodologies based on VHDL, Verilog, SystemVerilog, SystemC, and MyHDL.
I have co-founded Easics (http://www.easics.com), a SoC design services company, and Sigasi (http://www.sigasi.com), a company that develops IDEs for VHDL and Verilog.
I am also the creator and maintainer of two open source projects: MyHDL (http://www.myhdl.org), a Python library to use Python as a HDL, and Urubu (http://urubu.jandecaluwe.com), a micro CMS for static websites.
Today I work as an independent consultant.
Career history
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